The present invention relates to amplifiers. The present invention also relates to cable-modems and cable set-top boxes.
Various cable-modem systems and cable set-top box systems exist. These systems have an upstream information path and a down stream information path. The upstream path includes a digital-to-analog converter (DAC) and a cable line-driver/amplifier. The down stream path includes an analog-to-digital converter (ADC).
In conventional cable-modem systems and cable set-top box systems, the DAC and the ADC typically form part of a single integrated circuit or chip. This integration reduces the bill of materials and costs for these systems. The cable line-driver/amplifier, however, is not integrated along with the DAC and the ADC.
While conventional cable-modem systems and cable set-top box systems, which have a stand-alone cable line-driver/amplifier chip work well for their intended purposes, there is a need for a new amplifier that can be integrated on a single chip with the DAC and the ADC. There is also a need for new cable-modem systems and cable set-top box systems having a higher level of integration than the conventional cable-modem systems and cable set-top box systems.
An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In embodiments, the integrated circuit is used, for example, to form part of an upstream path of a cable-modem system or a cable set-top box system. In one embodiment, a filter and an upstream amplifier are integrated on a substrate with a DAC. Other embodiments of the invention include additional integration. For example, in some embodiments, an analog-to-digital converter and a processor are integrated on the substrate. Embodiments of the invention also include off-chip components such as, for example, a transformer and a diplexer.
System embodiments of the invention typically include a DAC, a low-pass filter, an integrated upstream amplifier, a transformer, a diplexer, an analog-to-digital converter (ADC), a tuner, and a processor.
In an embodiment, the DAC generates a differential analog current signal proportional to a digital input value. The maximum output current level of the DAC is adjustable. This output current drives a variable-gain current-mode upstream amplifier. The upstream amplifier produces a differential output current signal that is converted to a voltage signal by one or more resistors. This voltage signal is coupled to the input terminals of a transformer. The transformer""s single-ended output is coupled, for example using a diplexer, to a coaxial cable or other communications medium. The current-mode design of the upstream amplifier reduces or eliminates signal loss between the DAC and the upstream amplifier. With a current-mode design, the output voltage swing at the transformer is determined by the DAC""s full-scale output current, the upstream amplifier""s gain, and the upstream amplifier""s load impedance. The upstream amplifier has a low input-impedance and low-impedance internal nodes. The low-impedance internal nodes make for low internal voltage swings and higher amplifier bandwidths. In other embodiments, other upstream amplifiers are used such as, for example, a voltage-mode amplifier.
In one embodiment, the output signal level of the upstream amplifier is varied, in part, by scaling a digital input value to the digital-to-analog converter.
In embodiments, the upstream amplifier has a power-on mode of operation and a power-down mode of operation. In these embodiments, a software control bit can be used to switch between the power-on mode of operation and the power-down mode of operation.
In embodiments, the upstream amplifier operates in a burst mode. The output bursts are controlled using an internal transistor amplifier, a level shifter coupled to an input port of the internal transistor amplifier, and a switch. The switch is used to couple the level shifter to a voltage source (e.g., Vdd) or to a current sink to ground. The upstream amplifier produces an output current proportional to an input current when the switch couples the level shifter to the current sink to ground (burst-on). The output current is turned off when the switch couples the level shifter to the voltage source (burst-off).
In embodiments, the upstream amplifier includes a plurality of switched current mirrors. Typically, at least one of the plurality of switched current mirrors is always enabled during an output burst-on state of the upstream amplifier. In one embodiment, the plurality of switched current mirrors are controlled using a thermometer code. Other codes are used in other embodiments.
In embodiments having a current-mode upstream amplifier, an input signal is coupled to a diode-connected transistor of the upstream amplifier. An internal transistor amplifier is used to reduce the input impedance of the upstream amplifier.
In embodiments, a portion of a bias current of the upstream amplifier is provided by the digital-to-analog converter. This bias current scales along with a bias current of the digital-to-analog converter.
In embodiments of the invention, the upstream amplifier is a type class-A amplifier. In other embodiments, the upstream amplifier is a type class-AB amplifier. A plurality of switched current sources are used in embodiments of the invention to adjust a bias current of the upstream amplifier. The upstream amplifier power consumption scales with the upstream amplifier gain setting and the digital-to-analog converter bias current setting.
In embodiments of the invention, a transformer and a diplexer are used to couple the output ports of the upstream amplifier to a communications means such as a coaxial cable. In embodiments, transformers having a turns ratio of less than 2-to-1 are used. In an embodiment, a center tap of the transformer is connected to a voltage source through a resistor. In an embodiment, a transformer is connected as a Balun.
In one embodiment, a first resistor and a second resistor are coupled between the output ports of the upstream amplifier and a voltage source. In another embodiment, a single resistor is coupled between the two output ports of the upstream amplifier. In some embodiments, these resistors are disposed on the substrate with the upstream amplifier. In other embodiments, the resistors are not integrated.
In one embodiment, the filter coupled between the DAC and the upstream amplifier is an integrated first-order filter. In an embodiment, the integrated filter consists of only resistors and capacitors. In an embodiment, the filter is a current-mode filter having a current input and a current output. In an embodiment, the filter is differential. In an embodiment where the filter in not integrated, the filter is a fifth-order filter having resistors, capacitors, and inductors.
In embodiments of the invention, the DAC is operated at a sampling rate of 200 MHz. In another embodiment, the DAC is operated at a sampling rate of 400 MHz. Other rates are also possible in accordance with the invention.
In accordance with a method embodiment of the invention, an amplified signal is generated as follows. An input current signal is scaled by a scaling factor to form a first intermediate current signal. A bias current is added to the first intermediate current signal to form a second intermediate current signal. The second intermediate current signal is amplified using a plurality of switched current mirrors to form an amplified current signal. The number of switched current mirrors used to amplify the second intermediate current signal is based on a gain control signal. Course gain changes are made in embodiments of the invention by varying the gain control signal. Fine gain changes are made in embodiments of the invention by varying the scaling factor. In an embodiment, the input current signal is formed from a voltage signal. In an embodiment, an amplified voltage signal is formed from the amplified current signal.
In accordance with another method embodiment of the invention, a digital signal is converted to an analog signal as follows. A first analog current signal proportional to a digital input signal is generated. The first analog current signal is scaled by a scaling factor to form a second analog current signal. A bias current is added to the second analog current signal to form a third analog current signal. The third analog current signal is amplified using a plurality of switched current mirrors to form an output analog current signal. The number of switched current mirrors used to amplify the third analog current signal is based on a gain control signal. In embodiments, course gain changes are made by varying the gain control signal. Fine gain changes are made in embodiments by varying the scaling factor. In an embodiment, an output analog voltage signal is formed from the output analog current signal.
Further features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.